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Sometimes getting started is the hardest part. It’s better to try something and fail than to sit around doing nothing. Let’s start with a fundamental concept.
Some logic is combinatorial … usually that means it takes a bunch of inputs and produces some outputs but has no storage or memory. Combinatorial elements (like AND gates for example) don’t retain their state. When the inputs change, some time later the outputs change.
The other kind is called sequential … it’s composed of storage elements that have memory. Sequential elements can retain their state over time. Sequential elements usually have the concept of a control signal (usually called a clock but not necessarily). The control signal determines when a new value is stored.
These two categories are a good starting place for thinking about logic design. Combinatorial logic implements things like decision making logic, or addition, or multiplication. Sequential logic is required for things like state machines and making fast pipelines.
RTL (or register transfer language) design tends to focus on the sequential storage elements. Sequential elements have a special role because they are intimately related to the harder parts of chip design. The RTL languages Verilog (now System Verilog) and VHDL are the two most common.
It turns out that it’s easy to build huge cones of combinatorial logic as long as you don’t mind them running very slowly.
The most common combinatorial building blocks are the 1 and 2 input gates. Each has a truth table defining the relationship of the output to the inputs. Gates like INV (inverter), AND, OR, XOR, and MUX are used everywhere. It’s amazing how much we can do with such simple building blocks. Any function of any number of inputs can be built from simple 1 or 2 input gates.
The most common sequential building blocks are flip flops (I’ll call them flops) and latches. Latches are level sensitive while flops are edge sensitive. Level sensitive means the storage element accepts new inputs when the control signal is at a certain level (high or low). Edge sensitive means the storage element accepts new inputs when the control signal is transitioning or producing an edge (low to high is a rising edge, high to low is a falling edge).
Most designs try to use flops for sequential elements whenever possible but latches are sometimes required depending on the design goals. Nowadays it’s hard to find a college new grad (or senior engineer) who understands how to analyze latch timing… but I digress.
Combinatorial logic is used to make truth tables or functions of any number of binary inputs. Sequential logic is used to retain state. These two concepts together are used to make everything from the simplest digital circuits to cutting edge microprocessors.